1. Field of the Invention
This invention relates generally to a voltage translator circuit and, more specifically, to a voltage translator circuit which uses a tri-state buffer as an open collector driver to achieve high speed variable low voltage signal translation.
2. Description of the Prior Art
Presently, low voltage signal translation of a data bus uses a standard buffer device. The buffer is used to translate the data bits on the data bus from a high voltage of approximately 5volts to a low voltage of approximately 3.3 volts. While present voltage translator circuits do work, the voltage on the low voltage side of the translator is always fixed, or at best, voltage limited.
Therefore, a need existed to provide an improved voltage translator circuit. The improved voltage translator circuit must allow for a variable voltage on the low voltage side of the improved voltage translator circuit. The improved voltage translator circuit must further allow for lower voltage levels to be achieved on the low voltage side of the voltage translator circuit than is currently available with standard buffer devices. The improved voltage translator circuit must also operate at a speed comparable to present circuits.